In power electronics equipment, there is widely used a switching element referred to as an insulated gate type semiconductor device such as an IGBT (Insulated Gate Bipolar Transistor) or an MOSFET (Metal Oxide Semiconductor Field Effect Transistor) in order to control supply of power to a load such as an electric motor. Some insulated gate type semiconductor devices include a trench gate type semiconductor device having a gate electrode embedded in a semiconductor layer. On the other hand, attention is paid to a semiconductor device using silicon carbide (SiC) (hereinafter such a device will be referred to as a “silicon carbide semiconductor device”) as a next generation semiconductor device capable of realizing a high withstand voltage and a low loss, and development of a trench gate type silicon carbide semiconductor device is also advanced.
Referring to a trench gate type semiconductor device using silicon (Si), an avalanche electric field strength of a semiconductor layer is lower than a dielectric breakdown electric field strength of a gate insulating film. For this reason, a withstand voltage of the semiconductor device is determined by the avalanche electric field strength of the semiconductor layer. On the other hand, the avalanche electric field strength of
SiC is approximately 10 times as great as Si. Referring to the silicon carbide semiconductor device, therefore, the avalanche electric field strength of the semiconductor layer (SiC) is equivalent to the dielectric breakdown electric field strength of the gate insulating film. In the trench gate type semiconductor device, when a voltage is applied to the semiconductor device, an electric field concentration occurs in a corner part of a lower portion of a trench. Therefore, a dielectric breakdown occurs earlier over a gate insulating film in a corner part of a trench in the silicon carbide semiconductor device. For this reason, in the trench gate type silicon carbide semiconductor device, a withstand voltage is limited by the electric field strength of the gate insulating film.
Therefore, it is proposed that a protective diffusion layer having a p-type impurities implanted at a high concentration is provided on a drift layer in a lower portion of a trench in a case of an n-channel type in a conventional trench gate type silicon carbide semiconductor device (for example, Patent Document 1). In the conventional trench gate type semiconductor device, moreover, it is known that a plurality of trenches is provided and a protective diffusion layer is provided in a lower portion of each of the trenches as described in Patent Document 2. By providing the protective diffusion layer in the lower portion of the trench, thus, it is possible to relax an electric field concentration in a corner part of the trench and to enhance a withstand voltage.